In data networks, signals are normally transmitted in an encoded format and receivers use Phase Locked Loops (PLL) to recover the clocks and data from the received signals. In network communication systems, data is transmitted in packets of different formats, with certain gaps between the packets. If special precautions are not taken, every time a packet ends the Phase Locked Loops on that network go out of lock. A significant length of time will elapse before the phase-lock is reacquired. Such gaps in data transmission greatly increase the latency through the system, and reduce the system capability of transferring certain types of data streams such as Digital Video signals. To guarantee that the PLLs are kept in the phase-locked state and all times, an IDLE signal is transmitted between data packets which keep these phase locked loops in the desired locked state. However, when a signal path through a crossbar switch is changed, so does the propagation delay through the path in the device which results in a phase shift in the signal transferred, and possibly the loss of lock at the PLL at the remote end of the line. This issue becomes a problem when signals with a high rate of speed are routed using devices like crossbar switches. Differences in propagation delays between different paths may cause PLLs in the remote receivers to go out of lock. This invention deals with the time/phase shift problem and solves it by adding flip-flops in the data path which re-time the data and tie the data transitions to a stable master clock. This invention also deals with a different aspect of phase shifts and synchronization problems which are associated with routing signals using crossbar type switches, namely a problem caused by the disconnecting and reconnecting of signals when routes are changed. This invention describes a switching device wherein changes in the data paths do not cause phase shifts in the data outputs.
Prior art crossbar switches are usually made as general purpose switching devices without any specific circuitry expressly designed to deal with phase shifts and synchronization issues.
In prior art crossbar switch applications, the prevailing assumption was that propagation delay variations in different paths in the crossbar switch can be minimized, and no further processing at the crossbar switch level is required to prevent errors in the signals passed through the switch due to such delay variations. As the bandwidths of the signals which are routed through such devices increases, such assumption is no longer valid. A 100 ps delay change equals a 36 degree phase change in a 1 GHz signal frequency. This invention solves the delay variation problems by adding two mechanisms that when combined can eliminate the delay variations all together. To prevent such phase changes from being propagated beyond the boundaries of the crossbar switch, each output is equipped with a high- speed flip-flop. These flip-flops are clocked by a stable master clock. As the timing of data at the output of flip-flops depends on the timing of the clock to such flip-flops, placing flip-flops at the outputs of a crossbar switch, guarantees that data transitions at the outputs of these flip-flops is not affected by any data delay changes at the inputs to the said flip-flops. To ensure the proper timing between the data and the clock at the inputs to the flip-flops, a programmable delay device is inserted in each signal path through the switch. The lookup tables are addressed by the same control signals which are used to select a path through the crossbar switch and thus provide a different output code for different paths. Such programmable delay may be inserted in front of the crossbar switch or between the switch and the flip-flops. The control of the variable delay may be achieved either by an analog or digital delay locked loop, or by a lookup table. The programmable delay devices are programmed such that the amount of delay added in the signal path by the programmable device, will bring the transitions in the signal to within a small time window with regards to a known reference, regardless of the path through which the signal is passed. To further minimize delay variations and phase shifts they cause, each signal path is equipped with a very fast edge triggered flip-flop to re-clock and re-time the signal in the path. A stable clock at a rate appropriate for the signals in the path is used to clock the flip-flops, and provide a stable phase reference. A different aspect of the signal integrity relates to the changes in routes through the crossbar switch. The same rules of keeping PLLs on the remote ends in the xe2x80x9cLockedxe2x80x9d state at all times, should apply also when signal routes through the switch are altered. This invention deals with this issue in the form of a controller that configures the crossbar interconnections in a way that guarantees continuous phase lock in remote receivers.
The invention enables the implementation of a crossbar type switch in which synchronous serial data may be switched and rerouted without interruption and with minimal or no timing variations at the outputs of the switching device.